The present invention is related to limiting power dissipation in a switch, and in particular to programmable power limiting for a power transistor system.
Power supplies used in electronic devices often include power transistor systems that may be used to limit the electrical current to the devices or even to disconnect the power from the devices in the event of current overload. This current limitation protects the electronic devices from being damaged by a current overload. However, current limitation does not protect the switch transistors themselves in all situations. System capacitance and inductance in an electronic device, including for example the parasitic inductance in power cables, can cause a large inrush current when the device is first connected to power. Other problems in the system such as short circuits may also cause excessive current to flow through the system over time. Even if the current is limited to protect the electronic device and does not exceed the maximum current limit of the system, the power transistors used to limit the current may overheat if excessive power is dissipated in them during these high current conditions. This can cause physical damage to the power transistors and permanent system failure.
Hence, for at least the aforementioned reasons, there exists a need in the art for systems and methods for limiting power dissipated in a power transistor system.